3D Semiconductor Packaging Market - Increasing Use of Portable Electronics
3D packaging implies the use of 3D schemes based on conventional methods, such as wire bonding for vertical stacks and flip-chip interconnection. PoP configurations that are connected to stacked memory dies are also included in the global 3D semiconductor packaging market. Flip-chips are largely related to the 3D SiPs which have a great deal of applications in mainstream manufacturing and in infrastructure that are already established.
View full press release